The present invention relates in general to delta-sigma modulators, and in particular, to mismatch noise shapers that are integrated into the main loops of the delta-sigma modulators.
Delta-sigma modulators are particularly useful in digital-to-analog converters (xe2x80x9cDACsxe2x80x9d) and analog-to-digital converters (xe2x80x9cADCsxe2x80x9d). The delta-sigma modulator uses oversampling to spread the quantization noise power across the oversampling frequency band, which is typically much greater than the input signal bandwidth. Additionally, the delta-sigma modulator performs noise shaping by acting as a high-pass filter to the noise. Most of the quantization noise power is thereby shifted out of the signal band.
The typical delta-sigma modulator in an ADC includes an input summer which sums the analog input signal with negative feedback, an analog linear (loop) filter, a quantizer, and a feedback loop with a digital-to-analog converter unit (feedback DAC unit) coupling the quantizer output and the inverting input of the input summer. A delta-sigma DAC is similar to the ADC. A delta-sigma DAC has a digital input summer, a digital linear filter, a digital feedback loop, a quantizer, and an output DAC unit at the modulator output. In a first-order modulator, the linear filter comprises a single integrator stage; the filter in higher order modulators normally includes a cascade of a corresponding number of integrator stages. Higher-order modulators have improved quantization noise transfer characteristics over modulators of lower order, but stability becomes a more critical design factor as the order increases. For a given topology, the quantizer can be either a one-bit quantizer or a multiple-bit quantizer.
The feedback DAC unit for multi-bit delta-sigma ADCs and the output DAC unit for a multi-bit delta-sigma DAC are typically constructed from weighted conversion elements (e.g., various DAC elements for a DAC unit). Each conversion element (e.g., DAC element) converts one digital bit into a weighted-step analog voltage or current. The currents or voltages generated by the weighted conversion elements for the digital word being converted are then summed to generate the analog output signal. Mismatch between conversion elements, however, causes the weighted-steps of current or voltage to deviate from their ideal weighted-step values. The deviations may be a result of differences that exist among the conversion elements from the manufacturing or fabrication processes. Element mismatches are the result of mismatch noise and distortion in the output signal. Consequently, dynamic element matching (DEM) circuitry is normally included at the inputs of the conversion elements (e.g., DAC elements), and DEM circuitry spreads the mismatch noise across the analog output signal band.
Various well-known DEM designs exist. Exemplary DEM designs include barrel-shifting, individual level averaging, butterfly routing, and data weighted averaging. DEM circuits, however, do have significant drawbacks. For example, in multiple-bit modulators, the DEM circuitry is relatively large, especially in high voltage ADCs that require a large fabrication geometry. In the case of a delta-sigma DAC, the DEM circuit can often become tonal, thereby adding tonal noise to the output signal. In addition, a tendency for the DEM circuit to become tonal exists, as the DEM circuit is typically a low order, delta-sigma modulator.
A DEM circuit is typically located outside of the main loop of a delta-sigma modulator since mismatch noise is generally not affected by the feedback loop and is not shaped. Thus, the DEM circuit is generally controlled by the output of the quantizer. However, if the quantizer provides an output which does not allow the DEM circuit to variably control and select usage of DAC elements to have certain values for a period of time, then the operation of the DEM circuit to reduce mismatch noise, in effect, becomes nullified.
The present invention recognizes the desire and need for a circuit (e.g., similar to a DEM circuit which shapes mismatch noise) to override the output of the quantizer as appropriate and/or necessary. Particularly, the present invention recognizes this desire and need when the quantizer provides an output which does not allow the DEM circuit to variably control and select usage of DAC elements to have certain values for a period of time. The present invention overcomes the problems and disadvantages that have been encountered with the prior art.
The principles of the present invention are generally embodied in a mismatch noise shaper that is integrated into the main loop of a delta-sigma modulator. The quantizer of the delta-sigma modulator provides at least three quantization levels, and the mismatch noise shaper shapes mismatched element usage for the three or more quantization levels. The output of the mismatch noise shaper is fed back to the summer as a feedback signal that is responsive to the mismatch noise shaper. At appropriate times, the mismatch noise shaper selectively overrides the quantizer so that the mismatch noise shaper changes output values of the mismatch noise shaper from values representative of a corresponding output value of the quantizer to other values representative of a different output value of the quantizer. The overriding feature distinguishes the present invention from a DEM, as the output of a DEM is only a re-ordering of the same number of elements as its input. The mismatch noise shaper selectively overrides the quantizer when the output of the quantizer has prevented the mismatch noise shaper from controlling selection of elements at the output of the mismatch noise shaper for a pre-determined time period.